SYMPOSIUM MINISYMPOSIA

ABSTRACT

The field of multiple processor computer systems has experienced extensive growth in recent years. In order to operate these systems practically, an operating system or extensions must be developed to adequately handle multiple processors. In this paper, several versions of a multiprogramming multiprocessor system are simulated.

At the hardware level, the simulation model consists of four components: a shared memory area, a variable number of processors, a system clock, and a single input/output device. A single system clock governs and synchronizes simultaneous process execution. A variable number of processors execute basic operations of different lengths. Processes are stored in and use a single shared memory area. A single input/output device handles I/O requests from loaded processes one request at a time. Each processor executes instructions from one process at a time.

At the operating system level, the simulation model consists of three components: a ready queue, a waiting queue, and several blocked queues. A ready queue stores processes ready to execute until a CPU becomes available. A waiting queue holds processes awaiting completion of I/O requests. As a mechanism for process synchronization, semaphores are implemented to block processes, storing them in a blocked queue local to the semaphore performing the block. Parallel programming constructs are available for parallel operations.

All processes are processor independent. As a result, this model is useful for statistical analysis and reporting of processor use. Scheduling algorithms are compared and analyzed for efficiency. Through a graphical user interface, one is able to examine the contents and status of the shared memory area, all queues, registers, semaphores, and the I/O device. Facilities are provided for display of processor use and efficiency statistics.

There are two modes of simulation. In one mode, the skeleton of a program can be laid out so that it may be tested at a higher level of abstraction. On the lower level of abstraction, one can test the execution of programs developed in a low-level pseudo-assembly language.

The simulation model is implemented as a modular system. Therefore, performance evaluations of new adaptations of this model will be simple to implement. This simulation model could have implications in a variety of fields, such as supercomputing, shared-processor multi-user environments, statistical front modeling, and computational fluid dynamics. With extensive visualization of both the hardware and software levels, this simulation model can be used for education in the field of computer science. The design model will make it possible to visualize the methods used at both the hardware and software levels for multi-processor systems, concurrent programming, and parallel programming. In the future, this model could be adapted to compare other scheduling algorithms, load balancing mechanisms, and memory area implementations.

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